As a part of a Rice University engineering program, I was given the task of creating a capstone project based on an engineering concept of interest. I chose to focus on chip design, a pressing topic in the field of electrical engineering. Over the years, we've seen Moore's Law effect the evolution of chip design, but more recently, Moore's Law has begun to slow down as chip sizes start to reach atomic levels. My research led me to a few solutions: chiplets and 3D stacking. When preparing this project, I conducted a thorough analysis of numerous published findings and scientific studies, breaking down the anatomy of chiplets and the process of 3D stacking. Then, I evaluated both the pros and the cons of these approaches and their potential future implications. Overall, my experience working on this project was incredibly impactful. It helped me discover a new interest in semiconductors while learning valuable research and analysis skills.